Spirent Technology Innovation Program for Network Silicon and Infrastructure Validation

System on a Chip (SoC) and Application-Specific Integrated Circuits (ASICs) are designed with complex components requiring diligent and thorough validation to ensure the highest quality. Issues found in silicon chips after they are shipped can result in extremely high costs of software patching and quality assurance and may impact brand image in major ways.

Design issues found late in post-silicon validation cost thousands of hours of wasted effort and may directly affect time-to-market. In fact, the cost of discovering defects after release may be up to 30 times more expensive than during design phase.